Hardware Architecture

The hardware at the heart of this development process is based around a Xilinx Zynq-7000 System-on-a-Chip, with dual core processor and programmable FPGA combined with and an Analog Devices AD9361 RF Agile transceiver with integrated 12-bit ADCs and DACs. These two devices have been incorporated into a single hardware platform, the Avnet PicoZed SDR development kit. Note that this product has since been discontinued by Avnet but is now supported by Analog Devices as the ADRV9361 System-on-Module and is still recommended for new designs. As well as being a powerful and very flexible system module it is fully verified, low power, and has been tested to MIL-STD 202G for thermal, vibration and shock.

The platform will be used for establishing a test link between two SDR devices, for measuring system performance and for providing recommendations on SDR use in IoT applications.

Features on the ADRV9361 System on Module include:

• Analog Devices AD9361-BBCZ Integrated RF Agile Transceiver™
• Xilinx Zynq XC7Z035-2L FBG676I AP SoC
• Software tuneable across wide frequency range (70MHz to 6GHz)
• Channel Bandwidths up to 56MHz
• Supports 2x2MIMO radio, with less than 1 sample sync on both ADC and DAC

Figure 1 shows a system diagram of the major blocks on the ADRV9361 System on Module:

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